The present invention relates to a plasma addressed display device including a flat panel having a display cell and plasma cell stacked to each and peripheral circuits, and particularly to a technique of enhancing the resolution of scanning lines formed on the plasma cell.
FIG. 1 shows the structure of a plasma addressed display device disclosed in Japanese Patent Laid-open No. Hei 4-265931. As shown in FIG. 1, the plasma addressed display device has a flat panel structure including a display cell 1, a plasma cell 2, and a common intermediate sheet 3 interposed therebetween. The intermediate sheet 3 is typically formed of an extremely thin glass sheet and is called a micro-sheet. The plasma cell 2 includes a lower glass substrate 4 joined to the intermediate sheet 3. A dischargeable gas is enclosed in a gap formed between the plasma cell 2 and the intermediate sheet 3. Stripe-shaped scanning electrodes are formed on the inner surface of the lower glass substrate 4.
These scanning electrodes function as pairs of anodes A and cathodes K. The scanning electrodes can be formed with good productivity and workability by printing a pattern of the scanning electrodes on the flat glass substrate 4 using a screen printing process or the like and burning the pattern. Partition walls 7 are formed on the glass substrate 4 in such a manner as to partition each pair of the anode A and cathode K from the adjacent one, that is, to partition the gap filled with the dischargeable gas into the discharge channels 5. The adjacent discharge channels 5 are separated from each other with the partition wall 7. The partition walls 7 can be also formed by printing a pattern of the partition walls 7 using the screen printing process and burning the pattern. The tops of the partition walls 7 are in contact with the one surface side of the intermediate sheet 3. In the discharge channel 5 surrounded by the pair of partition walls 7, plasma discharge is generated between the anode A and cathode K. The intermediate sheet 3 is joined to the lower glass substrate 4 with glass frit or the like.
The display cell 1 includes a transparent upper glass substrate 8. The glass substrate 8 is bonded to the other surface side of the intermediate sheet 3 with a specific gap put therebetween by means of a sealing material or the like. A liquid crystal 9 as an electro-optical material configured is enclosed in the above gap. Signal electrodes Y are formed on the inner surface of the upper glass substrate 8. A matrix of pixels are formed at intersections of the signal electrodes Y and the discharge channels 5. A color filter 13 is provided on the inner surface of the glass substrate 8, to typically allocate three primary colors, R (Red), G (Green), and B (Blue) to each set of three pieces of the pixels. The flat panel having such a configuration is of a transmission type in which, for example, the plasma cell 2 is located on the light incoming side and the display cell 1 is located on the light outgoing side. A backlight 12 is mounted to the plasma cell 2 side.
The plasma addressed display device having the above configuration carries out the display drive by switchingly scanning, in line-sequence, rows of the discharge channels 5 for performing plasma discharge, and applying image data to columns of the signal electrodes Y on the display cell 1 side in synchronization with the scanning. When the plasma discharge is generated in each discharge channel 5, the potential of the inside of the discharge channel 5 nearly uniformly becomes an anode potential, to thereby effect pixel selection for each scanning line. That is to say, one discharge channel 5 corresponds to one scanning line, and it functions as a sampling witch. When an image data is applied to each pixel in the state in which the plasma sampling switch is made conductive, the image data is sampled, to thereby control turn-on or turn-off of the pixel. Even after the plasma sampling switch is made non-conductive, the image data is left held in the pixel. In this way, the display cell 1 carries out the image display by modulating incoming light from the backlight 12 in accordance with the image data and allowing the light thus modulated to go out of the display cell 1.
FIG. 2 is a typical view showing only a portion of two pixels of the plasma addressed display device, in which only two signal electrodes Y1 and Y2, one cathode K1, and one anode A1 are shown for an easy understanding. Each pixel 11 has a stacked structure having the signal electrode Y1 (or Y2), liquid crystal 9, intermediate sheet 3 and discharge channel. The discharge channel is substantially connected to the anode potential during the plasma discharge. When an image data is applied to each of the signal electrodes Y1 and Y2 in such a state, electric charges are injected in the liquid crystal 9 and the intermediate sheet 3. After completion of the plasma discharge, the potential of the discharge channel becomes a floating potential because the discharge channel is returned into the insulating state, with a result that the injected electric charges are held in the pixel 11. The so-called "sampling hold" is thus performed. Accordingly, the discharge channel functions as sampling switch elements provided in respective pixels 11, and therefore, it is typically designated by switching symbols S1. Meanwhile, the liquid crystal 9 and intermediate sheet 3 held between the signal electrode Y1 (or Y2) and the discharge channel function as a sampling capacitor. When the sampling switch S1 is made conductive by scanning in line-sequence, an image data is written in the sampling capacitor, to turn on or turn off the associated pixel in accordance with the level of the data voltage. Even after the sampling switch S1 is made non-conductive, the data voltage is left held in the sampling capacitor, thereby performing the active matrix operation of the display device. An effective voltage actually applied to the liquid crystal 9 is determined on the basis of the capacity-division between the liquid crystal 9 and the intermediate sheet 3.
In the plasma addressed display device having the above configuration, for the purpose of enhancing the resolution, it is required to increase the density of pixels arranged in a matrix. To make fine the pixels in the horizontal direction (row direction), the line width of each of signal electrodes arranged in columns may be made thin. To make fine the pixels in the vertical direction (column direction), the arrangement pitch of rows of discharge channels may be made short. However, each discharge channel is separated from the adjacent one by a partition wall. From the viewpoint of the processing technique, it is difficult to make extremely thin the thickness of the partition wall, and the minimum thickness of the partition wall for ensuring the necessary mechanical strength is determined. Accordingly, if the arrangement pitch of the discharge channels is made short, an area occupied by the thicknesses of the partition walls is relatively enlarged. This gives rise to a problem in sacrificing the opening area through which light actually passes. In other words, as the number of the discharge channels, that is, the scanning lines becomes larger, the opening ratio of the panel becomes lower. Incidentally, the partition wall, which is relatively high, blocks obliquely incident light rays. Accordingly, as the arrangement pitch of the partition walls becomes shorter, the blocked amount of obliquely incident light rays becomes larger. This gives rise to a problem in making narrow the viewing angle on the observer side.
In accordance with the related art, as described above, the achievement of the high-precision plasma addressed display device results in the reduction in opening ratio because of limitations in process of forming partition walls and scanning electrodes. This leads to inadequate brightness of the display. And, if the light emission amount of a backlight is made larger to compensate for the inadequate brightness of the display, the power consumption of the backlight is increased. Also, it is difficult to finely form partition walls and an electrode structure without increasing the occurrence ratio of defects. That is to say, it is difficult to make compatible the productivity of the display with the opening ratio thereof. For example, in the structure of a plasma cell shown in FIG. 3, a discharge channel 5 is formed at an arrangement pitch P of 1,000 .mu.m. The width of a partition wall 7 is 200 .mu.m, and the width of each of an anode A and a cathode K is 200 .mu.m. Accordingly, the opening ratio of the panel shown in FIG. 3 becomes 40% on the basis of the calculation of [1-(200+200+200)/1000=0.4]. If the arrangement pitch P of 1,000 .mu.m is made fine into 700 .mu.m, the opening ratio is reduced to 14% on the basis of the calculation of [1-(200+200+200)/700=0.4. In this case, if the electrode width of each of the anode A and cathode K is made thin, the opening ratio can be made high to some extent. The narrowing of the electrode width, however, may cause disconnection and the like, giving rise to problems in lowering the manufacturing yield and significantly reducing the productivity.